1. Field of Invention
The present invention relates to a display driving device, and more particularly to a display driving device for solving the problem of stripes occurring on a display panel when accompanied with a system, for example, a notebook computer system, upon booting.
2. Description of Related Art
In the recent digital times, flat panel display devices such as a liquid crystal display (LCD), an organic light emitting diode (OLED) display and a plasma display device, etc., have been accepted and popular in the market due to its features of light weight, thin, short, and compactness. In portable electronic devices, such as notebook computers, portable video disc players, personal digital assistants (PDAs) and the like, the flat panel display is even indispensable. However, when the flat panel display is accompanied with a system, such as a notebook computer system, the timing relationship between the respective voltage signals within the flat panel display and system data input signals is mismatched, thus upon booting, stripes may occur on the display panel. The stripes are regularly generated on the display panel from top to down, which undesirably consumes electrical power, and the display quality of the flat panel display is thereby questioned by the consumer.
FIG. 1 is a conventional display driving device 10, suitable for the above flat panel display. Referring to FIG. 1, the display driving device 10 comprises a single-channel pulse width modulation circuit 11, a boost-lowering voltage circuit 13, and a display driver 15. Wherein the voltage signals associated with the display panel 17 upon booting include a voltage signal VDDD for providing the logic operations of the display driving device 10, a voltage signal VDDG for enabling pixels of the display panel 17, a voltage signal VEEG for disabling the pixels of the display panel 17, and an operation voltage signal VDDA provided to the display panel 17 when the pixels is enabled.
Referring to FIG. 1, the single-channel pulse width modulation circuit 11 is powered by the voltage signal VDDD, and then output to supply the operation voltage signal VDDA when the pixels are enabled, to the buck-boost circuit 13 and the display driver 15. Then, the boost-lowering voltage circuit 13 provides the voltage signals VDDG and VEEG to the display driver 15, according to the voltage signal VDDA. The voltage signals VDDG and VEEG are respectively used for enabling and disabling the pixels of the display panel 17. Then, the display driver 15 is used to drive the display panel 17 according to the received voltage signals VDDA, VEEG, and VDDG.
The stripes occur on the display driving device 10 accompanied with a system such as a notebook computer system. Referring to FIG. 2, it is a timing chart of each voltage signal, system signal, and system data of the display driving device 10. It can be seen from the FIG. 2 that, the timing of the voltage signals VDDD, VDDA, VEEG, and VDDG is VDDD→VDDA→VEEG→VDDG. It can be seen from FIG. 2 that the display panel 17 has already been driven by the voltage signals VDDD, VDDA, VEEG, and VDDG, and starts to display the received data, before the system signal and the system data are generated, however, the data received by the display panel 17 at that time is not from the system, but random and irregular signals, whereby stripes are generated.
FIG. 3 is another conventional display driving device 30 to solve the above problem of stripes generated on the display driving device 10. The display driving device 30 includes a delay setting circuit 31, a multi-channel pulse width modulation circuit 33, and a display driver 35, wherein the display driver 35 is used to provide signals to drive the display panel 37. The display driving device 30 may use a delay setting circuit 31 and a multi-channel pulse width modulation circuit 33 to directly adjust the timing relationship among the voltage signals VDDA, VEEG, and VDDG into VEEG→VDDG→VDDA, thereby eliminating the phenomenon of stripes otherwise generated when random and irregular data signals are received at the display.
The display driving device 30 may use the delay setting circuit 31 and the multi-channel pulse width modulation circuit 33 to directly adjust the timing relationship among the three voltage signals VDDA, VEEG, and VDDG, to achieve a purpose of eliminating the stripes, but it is not a preferred solution due to the high cost thereof.